Louis Ledoux

Computer arithmetic, compilers, and hardware architectures.

I am Louis Ledoux, Associate Professor (Maître de conférences) at Université de Rennes / ISTIC and a member of the Taran team at IRISA and Inria.

My research connects computer arithmetic, compiler transformations, and hardware architectures. I work on floating-point datapaths, tensor accelerators, and the compilation of numerical kernels to FPGA and ASIC implementations, using MLIR, CIRCT, and FloPoCo.

I joined Rennes in August 2026. Previously, I was a postdoctoral researcher in the Emeraude team at Inria / INSA Lyon. I completed my PhD at the Barcelona Supercomputing Center and Universitat Politècnica de Catalunya.

See my research, publications, software projects, and teaching material.

Outside research, I make music, build instruments, and create visual work from circuit layouts. I share my home with Ada, the cat in the photograph.

Louis Ledoux with his cat Ada

Ada and me (I am the human).

latest posts

selected publications

  1. MicPro
    Reconfigurable Constant Multipliers: Hardware Models, Optimization Algorithm and Applications
    Reconfigurable Constant Multipliers: Hardware Models, Optimization Algorithm and Applications
    Bastien Barbe, Louis Ledoux, Anastasia Volkova, and
    Microprocessors and Microsystems, Jun 2026
  2. MLIRWS
    Progressive Arithmetic Lowering from Tensor Kernels to Synthesizable Datapaths
    Progressive Arithmetic Lowering from Tensor Kernels to Synthesizable Datapaths
    Louis Ledoux, Pierre Cochard, and Florent de Dinechin
    EuroLLVM Developers’ Meeting 2026, Apr 2026
    MLIR Workshop communication
  3. FPL
    An Open-Source Framework for Efficient Numerically-Tailored Computations
    An Open-Source Framework for Efficient Numerically-Tailored Computations
    Louis Ledoux, and Marc Casas
    In 2023 33rd International Conference on Field-Programmable Logic and Applications (FPL) , Sep 2023
    ISSN: 1946-1488