software-stack
Research software map from model/kernel entry to silicon evidence
Compilation flow
Kernel or model → MLIR transformations → arithmetic generation → CIRCT / RTL → physical implementation → evaluation.
Components
Front-end and ingestion
- MLModelMLIRGEN: exports model artifacts from PyTorch to MLIR.
- Faust and tensor kernels as entry points (DSP + AI use cases).
Arithmetic-aware compilation
- Emeraude-MLIR: custom dialects and lowering passes.
- HAriCo/FloPoCo direction for explicit arithmetic materialization.
HDL and interop
- VH2V: VHDL-to-Verilog bridge where needed for OSS flow compatibility.
Physical implementation and campaign orchestration
- SUF: reproducible campaign orchestration over open EDA flows.
- OpenROAD-GPL Experiments: placement-centric experiments and visualization.
Layout post-processing and communication
Evaluation
Generated circuits are evaluated with physical design tools to test arithmetic and compiler cost models.